The Research and Postgraduate Centre congratulates the School of Artificial Intelligence and Robotics (SAIR) and the School of Computing and Data Science (SCDS) on their recent research article published in Scientific Reports, a SCIE Q1 journal indexed by Web of Science with a current impact factor of 3.9.
The research was conducted in collaboration with Khulna University of Engineering & Technology, Hajee Mohammad Danesh Science and Technology University, Independent University Bangladesh, and Gulf University. Funding was provided by Xiamen University Malaysia (grants XMUMRF/2020-C6/IECE/0016 and XMUMRF/2021-C8/IECE/0025) and by Independent University Bangladesh (VCRF-SETS:24-021).
The paper, titled "Low Latency FPGA Implementation of Twisted Edward Curve Cryptography Hardware Accelerator over Prime Field", presents a high-performance FPGA implementation of elliptic curve cryptography (ECC) using twisted Edwards curves (Edwards25519) over a 256-bit prime field. Central to the design is a unified point operation architecture that performs point addition and doubling within a single module using projective coordinates, improving both latency and throughput. The point multiplication unit completes operations in 1.4 milliseconds at 117.8 MHz, using 164,730 clock cycles and achieving a throughput of 183.38 kbps on the Xilinx Virtex-5 FPGA platform.
The study reports significant improvements in latency and power efficiency compared to existing implementations, demonstrating the applicability of this architecture for secure data encryption in real-time embedded systems. It also illustrates how hardware-level cryptography can be applied in wireless communication, the Internet of Things, and mobile systems.
The published full article can be accessed at: https://doi.org/10.1038/s41598-025-99100-x
This work was carried out by Assoc. Prof. Dr. Mohammad Arif Sobhan Bhuiyan (SAIR), Asst. Prof. Dr. Teh Jia Yew (SCDS), and Assoc. Prof. Dr. Mahdi Hassan Miraz (SCDS), who all serve as corresponding authors, together with Asst. Prof. Dr. Kang Chia Chao (SAIR, senior IEEE member).
